1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to reducing power consumption of a video subsystem.
2. Description of the Relevant Art
Multiple-display technology enables a single graphics processing unit (GPU) to simultaneously support multiple independent display outputs. In one example, a computing system may independently connect up to six high-resolution displays in various combinations of landscape and portrait orientations. Two or more of the six monitors may be grouped into a large integrated display surface. This “surround-sight” feature provides an expanded visual workspace. Gaming, entertainment, medical, audio and video editing, business and other applications may take advantage of the expanded visual workspace and increase multitasking opportunities.
For each supported display, a video subsystem maintains a respective frame buffer that stores data, such as one or more video frames, which may be stored in dynamic random access memory (DRAM). For each supported display, a video controller reads data via a given one of one or more DRAM interfaces for access to a respective frame buffer. A memory clock (MCLK) is typically used to control a data rate into the frame buffer within the DRAM.
Computing systems may generally set the MCLK to a maximum frequency in order to maximize the data rate. Changing the MCLK frequency, such as decreasing its value to reduce power consumption, may utilize a training session with the DRAM interface. However, in various cases, a DRAM interface that is not currently being utilized may not be free for a sufficient duration of time to retrain the DRAM interface. Therefore, in some systems the MCLK remains at a maximum frequency even during periods of non-use or low activity. The power consumption during these periods of time for multiple displays may be significant.
As power consumption increases for modern integrated circuits (ICs), more costly cooling systems such as larger fans, larger heat sinks and systems to control ambient temperature are utilized to remove excess heat and prevent IC failure. International standards and programs have been created to reduce energy consumption in various products including computer products. These programs provide labels to identify and guide customers in purchasing qualifying energy efficient products. The Energy Star program is one such program. These programs have been estimated to save billions of dollars in energy costs on a yearly basis.
The DRAM may have a low power “self-refresh” mode in which the DRAM internally generates refresh cycles used to maintain the integrity of the data stored in the DRAM frame buffer. However, to use such refresh cycles, stored data is not generally accessible. Further, employing the low power self-refresh mode is generally performed after reconfiguring the MCLK to a lower frequency to allow for low latency transitions in and out of the low power mode. Again, the DRAM interface may not be free for a sufficient duration of time to retrain the DRAM interface and lower the MCLK frequency.
In view of the above, efficient methods and systems for reducing power consumption of a video subsystem are desired.